ARM shows off their next generation multi-core microarchitecture, providing higher performance ceilings without compromising efficiency. This technology will lay the foundation for future ARM Cortex-A processors.
ARM DynamIQ technology is to address the industry demand for ubiquitous AI, autonomous systems and accelerating the integration of virtual worlds toward a mixed reality experience. ARM believes DynamIQ will be pervasive in cars, homes, and smartphones as well as countless other connected devices where machine learning (ML) is applied to the zettabytes of data they generate – both within the cloud and at the device level – advancing AI for a more natural and intuitive user experience.
DynamIQ big.LITTLE carries on the ‘right processor for the right task’ approach and enables configurations of big and LITTLE processors on a single compute cluster which were previously not possible. For example, 1+3 or 1+7 DynamIQ big.LITTLE configurations with substantially more granular and optimal control are now possible. This boosts innovation in SoCs designed with right-sized compute with heterogeneous processing that deliver meaningful AI performance at the device itself.
What this all means, is that now there are dedicated processor instructions for ML and AI. Cortex-A processors designed for DynamIQ technology can be optimized to deliver up to a 50x boost in AI performance over the next 3-5 years with up to 10x faster response between CPU and specialized accelerator hardware on the SoC for better combined performance.
This also brings more flexibility – SoC designers can scale up to eight cores in a single cluster and each core can have different performance and power characteristics. These advanced capabilities enable faster responsiveness to ML and AI applications. A redesigned memory subsystem enables both faster data access and enhance power management.
DynamIQ also allows for efficient and much faster switching of software tasks to match the right-sized processor for optimal performance and power is further enhanced through independent frequency control of individual processors. It also brings greater levels of responsiveness for ADAS solution and increased safety capabilities which will enable partners to build ASIL-D compliant systems for safe operation under failure conditions.
